1. Field of Invention
The present invention relates to a source driving circuit, and more particular, a source driving circuit with high efficiency and low consumption.
2. Description of Related Art
Various types of electronic devices have display devices, such as TVs, laptop computers, monitors and mobile communication terminals. The display devices are requested to be thin and/or light in order to save the volume and the cost of the electronic devices. To satisfy these requirements, various Flat Panel Displays (FPDs) have been developed as alternatives to more conventional cathode ray tube displays.
A liquid crystal display (LCD) is one kind of the FPDs. In the LCD device, a source driver plays an important role, which converts the digital video data into driving voltages and delivers the driving voltages to pixels on a display panel of the LCD. The source driver includes an output buffer for enhancing the driving ability of the driving voltage so as to avoid signal attenuation.
FIG. 1 shows a conventional output buffer 100 of a source driver. The output buffer 100 includes an input stage 110, a current source, and an output stage 120. The input stage 110 includes transistors N1 through N4. The transistors N1 and N2 compose a differential pair which receives differential input signals at input nodes Vin+ and Vin−. The current source implemented by a transistor N5 provides a bias current to the input stage 110. The output stage 120 includes transistors N6 through N9 to output an output voltage at an output node Vout according to the differential input signals at input nodes Vin+ and Vin−.
The output buffer 100 is used as a unit-gain buffer by connecting the output node Vout to the input node Vin−, such that the output buffer 100 is under a static state when the differential input signals at the input nodes Vin+ and Vin− are equal. When the output buffer 100 is under a transient state, it can either be under a charge state or under a discharge state. If the signal at the input node Vin+ is higher than the signal at the input node Vin−, the output buffer 100 is under the charge state so as to pull high the voltage at the output node Vout. During this charge state, the current flowing through transistors N1 and N3 is comparatively larger than the current flowing through the transistors N2 and N4, such that the charge current Ich flowing through the transistor N8, mirrored from the current from the transistor N3, is rising so as to quickly pull high the voltage at the output node Vout.
If the signal at the input node Vin− is higher than the signal at the input node Vin+, the output buffer 100 is under the discharge state. During this discharge state, the current flowing through the transistors N2 and N4 is comparatively larger than the current flowing through the transistors N1 and N3, such that the charge current flowing through the transistor N9, mirrored from the current from the transistor N4, becomes larger, and thus the discharge current Idisch, mirrored from the current of transistor N6, is rising to quickly pull low the voltage at the output node Vout.
However, the size of the display panel is getting larger, and thus the larger charge current Ich and the discharge current Idisch are required for driving larger display panel.